This morning I found a disc packed with old code segments I wrote back in 1995... and buried at the bottom of a couple of folders relating to VIDC control, mode definitions and clock settings etc., was sitting a couple of files I barely remember writing - my own investigation of controlling the Watford Electronics Super VIDC enhancer which I had in my A310 at the time.
The first file "Syncer" was my test file for poking IIC control of the super VIDC, while trying to decode what did what. It contains a breakdown of all the sync_select and clock_select settings I determined (all possible I think?), I've copied this below:
Code: Select all
decoding WE super vidc enhancer - (c) phoenix 1995 __ HV 11HV CLK || || | So far &F0 = 36.000MHz, V+ V+ (800*600) %11 1100 00 &78 = 36.000MHz, V+ H- (640*350) %01 1110 00 &B4 = 36.000MHz, V- H+ (720*400) %10 1101 00 &3D = 25.175MHz, V- H- (640*480) %00 1111 01 &79 = 25.175MHz, V+ H- (640*350) %01 1110 01 &7B = 24.000MHz, V+ H- (640*350) %01 1110 11 &3F = 24.000MHz, V- H- (640*350) %00 1111 11 &F3 = 24.000MHz, V+ H+ (640*350) %11 1100 11
IIRC the WE software was very clunky. I think it was designed for RiscOS 2 - it certainly didn't support all the RiscOS 3 VGA/SVGA modes - and it contained lots of new mode definitions which were unnecessary on RiscOS 3. So the module I wrote was a much smaller and simpler controller, just to get the enhancer working correctly with all RiscOS 3 SVGA/VGA modes and remove the need for the WE software.
I'll email a copy now, as I still haven't figured the FTP out. Can you upload it?