AutoVIDC 2.09
Posted: Fri May 17, 2013 5:17 pm
Hi All,
I've just uploaded AutoVIDC 2.09 to the FTP server.
This is very much a beta release given the problems I've had getting it to assemble correctly today
This version features full on clock detection, which I've adapted from Steve's BASIC ARM assembler example. As a "feature" of this, on a TFT monitor, the screen may blank for about a second when AutoVIDC cycles the clocks for detection purposes before returning the clock to the one that was previously selected
Quite a bit of the other code in the system has been optimised/reduced in size but the addition of the clock detection code has increased the module size to almost 7.7Kb.
AutoVIDC can automatically detect 24, 25.175, 31.5, 32, 36, 40, 48, 50 and 60MHz clocks which should pretty much cover everything an avid over-clocker may want to fit and you can still tell it what is fitted manually via the * command for the over-clocking oscillator as you could previously.
The module also has a new SWI call.
AutoVIDC_ClockAvailable - This takes in a single parameter but it could be one of two sets of values.
On Entry
R0 - 0-3 -OR- Clock speed in kHz e.g. 25175
On Exit
R0 - 0-3 -OR- -1
On exit, AutoVIDC will respond with either -1 (unavailable) OR 0-3 which corresponds to the value you can pass in on AutoVIDC_SetClock.
Example:
MOV R0,#25175
SWI AutoVIDC_ClockAvailable ; Is the 25.175MHz clock available?
CMN R0,#1
BNE setClock ;If it is, go and set the clock...
MOV R0,#0 ;it's not available so select the 24MHz clock instead.
.setClock
SWI AutoVIDC_SetClock
In a standard environment, the line MOV R0,#25175 could be replaced with MOV R0,#1 as that is where the 25MHz clock would be expected to be.
The reason for allowing the clock speed as a parameter is to let you stick a 31.5 or 32MHz clock in place of the 25.175MHz clock and still able to determine whether a 25.175MHz clock is fitted at all...
Anyway, I've tested this on my A310, A410/1, A3010 and A5000 which pretty much covers every available VIDC1a based architecture and it seems OK.
Monitor wise, it's been tested with my Acorn AKF50 multi-sync and my IIyama E430S TFT. On the AKF50, you can see the screen going through each clock speed. On the Iiyama, the screen blanks for about 1 second whilst the clocks are cycled.
Before cycling the clocks, the current clock speed is stored and then it's restored after the test so everything should work as normal.
Full source code is in the distro. The clock detection code is self contained in a sub-folder called utils.
Paul
I've just uploaded AutoVIDC 2.09 to the FTP server.
This is very much a beta release given the problems I've had getting it to assemble correctly today
This version features full on clock detection, which I've adapted from Steve's BASIC ARM assembler example. As a "feature" of this, on a TFT monitor, the screen may blank for about a second when AutoVIDC cycles the clocks for detection purposes before returning the clock to the one that was previously selected
Quite a bit of the other code in the system has been optimised/reduced in size but the addition of the clock detection code has increased the module size to almost 7.7Kb.
AutoVIDC can automatically detect 24, 25.175, 31.5, 32, 36, 40, 48, 50 and 60MHz clocks which should pretty much cover everything an avid over-clocker may want to fit and you can still tell it what is fitted manually via the * command for the over-clocking oscillator as you could previously.
The module also has a new SWI call.
AutoVIDC_ClockAvailable - This takes in a single parameter but it could be one of two sets of values.
On Entry
R0 - 0-3 -OR- Clock speed in kHz e.g. 25175
On Exit
R0 - 0-3 -OR- -1
On exit, AutoVIDC will respond with either -1 (unavailable) OR 0-3 which corresponds to the value you can pass in on AutoVIDC_SetClock.
Example:
MOV R0,#25175
SWI AutoVIDC_ClockAvailable ; Is the 25.175MHz clock available?
CMN R0,#1
BNE setClock ;If it is, go and set the clock...
MOV R0,#0 ;it's not available so select the 24MHz clock instead.
.setClock
SWI AutoVIDC_SetClock
In a standard environment, the line MOV R0,#25175 could be replaced with MOV R0,#1 as that is where the 25MHz clock would be expected to be.
The reason for allowing the clock speed as a parameter is to let you stick a 31.5 or 32MHz clock in place of the 25.175MHz clock and still able to determine whether a 25.175MHz clock is fitted at all...
Anyway, I've tested this on my A310, A410/1, A3010 and A5000 which pretty much covers every available VIDC1a based architecture and it seems OK.
Monitor wise, it's been tested with my Acorn AKF50 multi-sync and my IIyama E430S TFT. On the AKF50, you can see the screen going through each clock speed. On the Iiyama, the screen blanks for about 1 second whilst the clocks are cycled.
Before cycling the clocks, the current clock speed is stored and then it's restored after the test so everything should work as normal.
Full source code is in the distro. The clock detection code is self contained in a sub-folder called utils.
Paul