Search found 2820 matches

by JonAbbott
Tue Jan 13, 2015 4:39 pm
Forum: Games
Topic: Cannon Fodder (1994) (Krisalis Software)
Replies: 14
Views: 23749

Cannon Fodder (1994) (Krisalis Software)

https://forums.jaspp.org.uk/release/F10065/Art/Cover/cover.png Cannon Fodder (1994) (Krisalis Software) ID: 10065 Version: Unknown Developer: Sensible Software; Jay Butler Genre: Strategy; Real time; War RAM: 2048 CPU compatibility: ARM2 ARM250 ARM3 ARM610 ARM700 ARM710 ARM7500 StrongARM ARMv5+ OS ...
by JonAbbott
Tue Jan 13, 2015 9:49 am
Forum: Pi
Topic: Disk swapping issues
Replies: 3
Views: 3755

Re: Disk swapping issues

This seems to have resolved the issue of swapping discs, however it now instantly locks the machine when a disc swap happens. I'm currently investigating why and hope it's resolvable I've managed to track down the issue and find a solution. RTSupport is again the root cause of the issue, it looks l...
by JonAbbott
Sun Jan 11, 2015 8:42 am
Forum: Pi
Topic: Codelet recycling
Replies: 5
Views: 4693

Re: Codelet recycling

Three SWI's remain which can't currently be recycled:
  • SharedCLibraryAPCS_R
  • Sound_Configure
  • Vector Claims (OS_AddCallBack, OS_Claim, OS_CallAfter, OS_CallEvery, OS_AddToVector, OS_ClaimDeviceVector)
These need moving to static entry points so the original SWI instruction can be released
by JonAbbott
Sun Jan 11, 2015 8:23 am
Forum: Pi
Topic: 26bit Module support
Replies: 126
Views: 75096

26bit Module support

Notes on providing 26bit module support Create a stub module header in the JIT RMA Heap and insert into the RMA, this needs to contain the SWI table, Command table and all Module entry points: Init, Start, Exit, Service (coded) All entry points need a managed entry/exit (coded) JIT RMA Heap and code...
by JonAbbott
Sun Jan 11, 2015 8:10 am
Forum: Pi
Topic: WIMP support
Replies: 4
Views: 8646

WIMP support

Notes on providing WIMP support
  1. At all ADFFS entry points, check Wimp_ReadSysInfo 5 or OS_ReadSysInfo 6 DomainId to confirm the current task is one we're handling
  2. Spawn a new JIT area for child tasks (created via either Filer_Run or Wimp_StartTask)
by JonAbbott
Fri Jan 09, 2015 11:26 am
Forum: Pi
Topic: Codelet reentrancy
Replies: 4
Views: 3943

Re: Codelet reentrancy

Ironically the codelet reentrancy is now causing the Pi to crash. It looks like the IRQ stack is being reset as RISCOS' IRQ handler exits, I need to investigate further. This turned out to be an issue design decision made in the RTSupport module where it resets the IRQ stack when it exits. It would...
by JonAbbott
Fri Jan 09, 2015 11:25 am
Forum: Pi
Topic: Disk swapping issues
Replies: 3
Views: 3755

Disk swapping issues

There are several reasons why it's difficult to swap discs in some games. The root cause itself is when a game sits in a tight loop waiting for input, be it a key or a disc change. Blowpipe, Chuck Rock and Xenon 2 all sit in loops of less than a dozen instructions; Blowpipe and Xenon 2 continually t...
by JonAbbott
Sun Jan 04, 2015 6:21 pm
Forum: ADFFS
Topic: RO5.x IOMD
Replies: 4
Views: 4523

Re: RO5.x IOMD

Finally got around to testing RO5 IOMD and to my amazement a few games actually work. RO5.20 had issues, but RO5.21 seemed better behaved. I'm not sure why that's the case, as I don't recall there being any dependency on bug fixes on IOMD. Both Zarch and Jet Fighter worked, games that write to VIDC1...
by JonAbbott
Fri Jan 02, 2015 8:52 pm
Forum: General
Topic: Game Request: Diggers
Replies: 26
Views: 18177

Re: Game Request: Diggers

I was somewhat sidetracked from this when the server trashed itself, but am now back at looking at Diggers whilst preparing the next ADFFS release. Actions left before it will work: Correct the audio fill code, which is hardcoded to the RO3.1 sound buffer addresses Add cursor support Add 26bit modul...
by JonAbbott
Wed Dec 31, 2014 4:01 pm
Forum: Pi
Topic: Codelet reentrancy
Replies: 4
Views: 3943

Re: Codelet reentrancy

Finally found the cause. As the abort handlers exit, the last two instructions switch to the aborting CPU mode and then load R0-PC. If an IRQ occurred between these two instructions, the registers became corrupt. The fix was simply to let the CPU switch the CPU mode as it loads PC via LDM ^. Testing...