;vector_handler_1E
;-----------------
;Prevents OS_Module 8/9 (RMTidy / RMClear)
;Passes Run, Run, Insert, InsertToRMA to JIT if applicable

.vector_handler_1E
 TEQ     R0, #Module_Delete		;RMKill
 BEQ     vector_handler_1E_Delete

 TEQ     R0, #Module_Tidy		;RMTidy
 TEQNE   R0, #Module_Clear		;RMClear
 EXITSWIEQ ""				;YES, trap them

 #if compile_RO > 311
   BL      check_JIT_and_taskID		;is the task supported?
   BNE     vector_handler_forward	;NO, hand to OS

   TEQ     R0, #Module_Enter		;check for BASIC
   BEQ     _check_for_BASIC

   TEQ     R0, #Module_Run		;YES, handle any loads
   TEQNE   R0, #Module_Load
   TEQNE   R0, #Module_InsertFromMemory
   TEQNE   R0, #Module_InsertFromMemoryToRMA
   BEQ     load_26bit_module		;load 26bit Module

					;--------------------------
   TEQ     R0, #Module_Claim		;need to check for VProtect
   BNE     vector_handler_forward

   LDR     R14, [R11, #VProtect_Module - VARS]
   TEQ     R14, #0
   BEQ     vector_handler_forward
   LDR     R0, [R13, #SWI_stack.R14]
   #if compile_RO == 400
     BIC     R0, R0, #&FC000003		;clear PSR
   #endif
   SUB     R0, R0, R14
   LDR     R14, [R11, #VProtect_Module - VARS + 4]
   CMP     R0, R14			;is it within VProtect?
   MOV     R0, #Module_Claim
   BLO     hv_OS_Module			;YES
					;--------------------------
 #endif
B       vector_handler_forward		;pass to OS


#if compile_RO > 311
._check_for_BASIC
 LDRB    R14, [R1, #0]
 BIC     R14, R14, #&20			;uppercase
 TEQ     R14, #ASC("B")
 LDREQB  R14, [R1, #1]
 BICEQ   R14, R14, #&20
 TEQEQ   R14, #ASC("A")
 LDREQB  R14, [R1, #2]
 BICEQ   R14, R14, #&20
 TEQEQ   R14, #ASC("S")
 LDREQB  R14, [R1, #3]
 BICEQ   R14, R14, #&20
 TEQEQ   R14, #ASC("I")
 LDREQB  R14, [R1, #4]
 BICEQ   R14, R14, #&20
 TEQEQ   R14, #ASC("C")			;is BASIC being entered
 BNE     vector_handler_forward		;NO
 LDRB    R14, [R1, #5]
 TEQ     R14, #0
 TEQNE   R14, #10
 TEQNE   R14, #13
 BNE     vector_handler_forward

 STMFD   R13!, {R2-R10}
 MOV     R0, #Module_Lookup
 ADR     R1, _BASIC26
 BL      pre_SWI_veneer			;call SWI that follows
 SWI     XOS_Module			;is BASIC26 loaded?
 BVC     _BASIC26_loaded		;YES

 BL      resetVectors			;reset key vectors
 MOV     R0, #Module_Lookup
 ADR     R1, _BASICTrans
 BL      pass_SWI_on			;call SWI that follows
 SWI     XOS_Module			;is BASICTrans loaded?
 BVC     _BASICTrans_loaded

 MOV     R0, #Module_Load		;NO, load our 32bit version
 ADR     R1, _load_BASICTrans
 SWI     XOS_Module			;load BASICTrans (its 32bit)
 BVS     _BASIC26_failed
 STRB    R0, [R11, #BASICTrans_loaded - VARS]	;remove it on JIT shutdown

 ._BASICTrans_loaded
 MOV     R0, #Module_Load
 ADR     R1, _load_BASIC
 SWI     XOS_Module			;load BASIC26 via JIT
 BVS     _BASIC26_failed
 BL      resetVectors			;reset key vectors

 ._BASIC26_loaded
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R2-R10}

 MOV     R0, #Module_Enter
 ADR     R1, _BASIC26
B       vector_handler_forward		;pass to OS


 ._load_BASIC		DCB "ADFFS:extras."
 ._BASIC26		DCB "BASIC26",0
 ._load_BASICTrans	DCB "ADFFS:extras."
 ._BASICTrans		DCB "BASICTrans",0
			ALIGN

._BASIC26_failed
 BL      resetVectors			;reset key vectors
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R2-R10}			;clear the stack
 ADR     R0, Error_BASIC26_failed
B       vector_handler_trap_VS
#endif



;Check if the module being killed is not essential

 .vector_handler_1E_Delete
 BL      check_essential_modules	;is the Module essential?
 EXITSWINE ""				;YES
#if compile_RO == 311
B       vector_handler_forward		;NO
#endif
#if compile_RO > 311
;Check if the Module is a 32bit->26bit shim Module
; and clear 26bit Module from JIT RMA

 BL      check_JIT_and_taskID		;is the task supported?
 BNE     vector_handler_forward		;NO, hand to OS

 STMFD   R13!, {R0-R10}
 MOV     R9, R1				;R9=module name

 MOV     R0, #Module_Lookup		;find the Module
 BL      pre_SWI_veneer			;call SWI that follows
 SWI     XOS_Module
 BL      post_SWI_veneer
 BVS     _exit				;exit on error

 LDR     R0, [R3, #Module_Header.ADFFS]
 EORS    R0, R0, #Module_Validation	;one of ours?
 BNE     _pass_to_os			;NO

 LDR     R2, [R3, #Module_Header.Address]	;YES, get 26bit address
 LDR     R4, [R3, #Module_Header.Size]		;and size

 MOV     R0, #Module_Delete
 MOV     R1, R9
 BL      pass_SWI_on2			;pass next SWI direct to OS
 SWI     XOS_Module
 BL      post_SWI_veneer
 BVS     _exit
					;stub now removed, 26bit can
					;now be cleanly removed
 BL      hv_reset_memory_block		;reset JIT space

 MOV     R0, #Heap_Free			;free 26bit Module block
 MOV     R1, #jit_RMA_heap
 SWI     XOS_Heap			;PRM1-380

 ._exit
 STRVS   R0, [R13]			;overwrite R0 if error
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R0-R10}
B       vector_handler_trap

 ._pass_to_os
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R0-R10}
B       vector_handler_forward		;pass to OS
#endif




;check_essential_modules
;-----------------------
;Checks if a Module is in the essential list

;Entry:
; R1 - pointer to Module title
;
;Exit:
; EQ - Module not essential
; NE - Module is essential

.check_essential_modules
 STMFD   R13!, {R9-R12, R14}
 LDRB    R12, prevent_RMKills		;should we prevent RMKills?
 TEQ     R12, #0
 LDMEQFD R13!, {R9-R12, PC}		;NO

 ADR     R12, Essential_Modules		;list of essential modules
 ._L1					;skip to next module name
   LDRB    R14, [R12], #1
   TEQ     R14, #0
 BNE     _L1

 LDRB    R14, [R12]
 TEQ     R14, #0			;end of the list?
 LDMEQFD R13!, {R9-R12, PC}		;YES

 MOV     R9, #0
 ._L2
   LDRB    R14, [R1, R9]		;compare module passed
   BIC     R14, R14, #%100000		;convert to uppercase
   LDRB    R11, [R12, R9]
   ADD     R9, R9, #1			;go to next byte

   ADDS    R10, R14, R11		;are bytes both 0?
   TEQNE   R10, #13			;..or is CR being used?
   BEQ     _essential			;YES, prevent the RMKill

   TEQ     R14, R11			;are both bytes the same
   BNE     _L1				;NO, go to next module
 B       _L2				;YES, loop

 ._essential
 CMP     R1, R12			;return with NE
LDMFD   R13!, {R9-R12, PC}
