;Entry:
;R0  = instruction
;R7  = original instruction address + 8
;R14 = re-interpreted instruction address + 8

;LDF CRd, [PC, ...		ARMARM-A5-56 rev.E p272
;STF
;LFM
;SFM

ALIGN   32, 4
.i_LDF_STF_post_indexed
 ORR     R0, R0, #1 << 21		;ensure Wb is set

.i_LDF_STF
 AND     R1, R0, #%1111 << 8
 TEQ     R1,     #%0001 << 8		;is it LDF/STF?
 ANDEQ   R1, R0, #%1111 << 16		;YES, R1=Rd
 TEQEQ   R1, #PC_reg << 16		; |   Rd=PC?
 BNE     i_copy_instruction		; |+  NO

 CODELET 5

 BIC     R2, R0, #%1111 << 16		;LDx/STx CRd, [__, ...
 ADR     R5, _codelet
 LDMIA   R5!, {R0-R1, R3-R4}		;get replacement instructions

					;-------- 4th instruction --------
 SUB     R5, R14, R6
 SUB     R5, R5, #8 + (5 * 4)		;correct for offset and prefetch
 BIC     R5, R5, #%111111 << 26
 ORR     R4, R4, R5, LSR #2		;B <original address + 4>

 STMIA   R6, {R0-R4}			;store codelet

B       i_instruction_handled


 ; LDF/STF CRd, [PC, ...
 ._codelet
 STR     R0, _codelet-4			;R0 tmp1
 LDR     R0, _codelet-codelet_PC	;R1
 ;LDF/STF CRd, [Rx, ...			;R2
 LDR     R0, _codelet-4 -4		;R3 tmp1
 DCD     B_blank			;R4 B <original address + 4>
					;5 instructions
