;References:
;swi - vector_handler_forward

;vector_handler_1E
;-----------------
;Prevents OS_Module 8/9 (RMTidy / RMClear)
;Passes Run, Run, Insert, InsertToRMA to JIT if applicable

.vector_handler_1E
 TEQ     R0, #Module_Delete		;RMKill
 BEQ     vector_handler_1E_Delete

 TEQ     R0, #Module_Tidy		;RMTidy
 TEQNE   R0, #Module_Clear		;RMClear
 BEQ     vector_handler_trap		;YES, trap them

 #if compile_RO > 311
   LDR     R14, jit_code		;is the JIT running?
   TEQ     R14, #0
   BEQ     vector_handler_forward	;NO, hand to OS

   #if JIT_WIMP_support == 1
     BL      check_task_ID		;is the task supported?
     BNE     vector_handler_forward	;NO, hand to OS
   #endif

   #if Private_BASIC == 1
     TEQ     R0, #Module_Enter		;check for BASIC
     BEQ     _check_for_BASIC
   #endif

   TEQ     R0, #Module_Run		;YES, handle any loads
   TEQNE   R0, #Module_Load
   TEQNE   R0, #Module_InsertFromMemory
   TEQNE   R0, #Module_InsertFromMemoryToRMA
   BEQ     load_26bit_module		;load 26bit Module
 #endif
B       vector_handler_forward		;pass to OS


#if Private_BASIC == 1
 ._check_for_BASIC
 LDRB    R12, [R1, #0]
 BIC     R12, R12, #&20			;uppercase
 TEQ     R12, #ASC("B")
 LDREQB  R12, [R1, #1]
 BICEQ   R12, R12, #&20
 TEQEQ   R12, #ASC("A")
 LDREQB  R12, [R1, #2]
 BICEQ   R12, R12, #&20
 TEQEQ   R12, #ASC("S")
 LDREQB  R12, [R1, #3]
 BICEQ   R12, R12, #&20
 TEQEQ   R12, #ASC("I")
 LDREQB  R12, [R1, #4]
 BICEQ   R12, R12, #&20
 TEQEQ   R12, #ASC("C")			;is BASIC being entered
 BNE     vector_handler_forward		;NO
 LDRB    R12, [R1, #5]
 TEQ     R12, #0
 TEQNE   R12, #10
 TEQNE   R12, #13
 BNE     vector_handler_forward

 ADR     R12, _SPSR			;YES
 STMFD   R13!, {R2-R11}
 MOV     R0, #Module_Lookup
 ADR     R1, _BASIC26
 BL      hv_pre_SWI_veneer		;call SWI that follows
 SWI     XOS_Module			;is BASIC26 loaded?
 BVC     _BASIC26_loaded		;YES

 BL      resetVectors			;reset key vectors
 MOV     R0, #Module_Lookup
 ADR     R1, _BASICTrans
 SWI     XOS_Module			;is BASICTrans loaded?
 BVC     _BASICTrans_loaded
 MOV     R0, #Module_Load		;NO, load our 32bit version
 #if Private_BASIC == 1
   TEMP    R1
   STR     R0, BASICTrans_loaded	;remove it on JIT shutdown
   LOCK    R1
 #endif
 ADR     R1, _load_BASICTrans
 #if compile_RO == 400
   BL      pass_SWI_on			;pass next SWI to SWI dispatch
 #endif
 SWI     XOS_Module			;load BASICTrans

 ._BASICTrans_loaded
 MOV     R0, #Module_Load
 ADR     R1, _load_BASIC
 SWI     XOS_Module			;load BASIC26
 BL      resetVectors			;reset key vectors

 ._BASIC26_loaded
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R2-R11}

 MOV     R0, #Module_Enter
 ADR     R1, _BASIC26
B       vector_handler_forward		;pass to OS

 ._SPSR			DBD 4
 ._load_BASIC		DCB "ADFFS:extras."
 ._BASIC26		DCB "BASIC26",0
 ._load_BASICTrans	DCB "ADFFS:extras."
 ._BASICTrans		DCB "BASICTrans",0
			ALIGN
#endif


.vector_handler_trap
LDMFD   R13!, {R12, PC}^		;clear down stack


;Check if the module being killed is not essential

 .vector_handler_1E_Delete
 BL      check_essential_modules	;is the Module essential?
 BNE     vector_handler_trap		;YES
 #if compile_RO == 311
   B       vector_handler_forward	;NO
 #endif
 #if compile_RO > 311
;Check if the Module is a 32bit->26bit shim Module
; and clear 26bit Module from JIT RMA

 #if JIT_WIMP_support == 1
   BL      check_task_ID		;is the task supported?
   BNE     vector_handler_forward	;NO, hand to OS
 #endif

 STMFD   R13!, {R0-R5, R9-R11}		;preserve R0-R5
 MOV     R9, R1				;R9=module name

 ADR     R12, _SPSR
 MOV     R0, #Module_Lookup		;find the Module
 BL      pre_SWI_veneer			;call SWI that follows
 SWI     XOS_Module
 BVS     _pass_to_os			;exit on error

 LDR     R0, [R3, #Module_Header.ADFFS]
 EORS    R0, R0, #&ADFF5		;one of ours?
 BNE     _pass_to_os			;NO

 LDR     R2, [R3, #Module_Header.Address]	;YES, get 26bit address
 LDR     R4, [R3, #Module_Header.Size]		;and size

 MOV     R0, #Module_Delete
 MOV     R1, R9
 BL      pass_SWI_on
 SWI     XOS_Module
 BL      post_SWI_veneer
 BVS     _pass_to_os			;exit on error
					;stub now removed, 26bit can
					;now be cleanly removed
 CMP     R11, #jit_RMA_heap		;is the Module in the JIT RMA?
 BLO     _exit				;NO, exit
 BL      hv_reset_memory_block		;reset JIT space

 MOV     R0, #Heap_Free			;free 26bit Module block
 MOV     R1, #jit_RMA_heap		;
 SWI     XOS_Heap			;PRM1-380

 ._exit
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R0-R5, R9-R11}		;restore registers
B       exit_SWI_veneer			;hand back to callee

 ._pass_to_os
 BL      dontexit_SWI_veneer
 LDMFD   R13!, {R0-R5, R9-R11}		;restore registers
B       vector_handler_forward		;pass to OS

 ._SPSR     DBD 4
 #endif




;check_essential_modules
;-----------------------
;Checks if a Module is in the essential list

;Entry:
; R1 - pointer to Module title
;
;Exit:
; EQ - Module not essential
; NE - Module is essential

.check_essential_modules
 STMFD   R13!, {R9-R12, R14}
 LDR     R12, prevent_RMKills		;should we prevent RMKills?
 TEQ     R12, #0
 LDMEQFD R13!, {R9-R12, PC}		;NO

 ADR     R12, Essential_Modules		;list of essential modules
 ._L1					;skip to next module name
   LDRB    R14, [R12], #1
   TEQ     R14, #0
 BNE     _L1

 LDRB    R14, [R12]
 TEQ     R14, #0			;end of the list?
 LDMEQFD R13!, {R9-R12, PC}		;YES

 MOV     R9, #0
 ._L2
   LDRB    R14, [R1, R9]		;compare module passed
   BIC     R14, R14, #%100000		;convert to uppercase
   LDRB    R11, [R12, R9]
   ADD     R9, R9, #1			;go to next byte

   ADDS    R10, R14, R11		;are bytes both 0?
   TEQNE   R10, #13			;..or is CR being used?
   BEQ     _essential			;YES, prevent the RMKill

   TEQ     R14, R11			;are both bytes the same
   BNE     _L1				;NO, go to next module
 B       _L2				;YES, loop

 ._essential
 CMP     R1, R12			;return with NE
 LDMFD   R13!, {R9-R12, PC}
