JonAbbott wrote:Looking at the code, it does seem to deviate from the VIDC20 docs. For example, instead of VXXX = N - 2, its using VXXX = N + 1.
Let's look at VCR for example:
The VIDC20 docs say "If N rasters required...value (N-2) should be programmed".
We are converting from a VIDC1 register value, so if you look in the VIDC1 docs, they say "If N rasters required...value (N-1) should be programmed".
So my code takes the VIDC1 value (ie. N-1) from the register, and subtracts 1 to get the VIDC20 value (ie. N-2).
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1940 CMP R0,#&A0/4 ;above &A0 (vertical setting)
1950 ADDGE R0,R0,#104 ; convert to VIDC20 register number
1960 SUBGE R1,R1,#1 ; translate vidc20value=(vidc1value-1)
I don't see where you find N+1?
JonAbbott wrote: The HXXX parameters are similar, which is where ADFFS is probably going wrong. I coded ADFFS to match the VIDC20 docs, however that doesn't seem to translate VIDC1 parameters to the correct matching VIDC20 values.
I've only used the same VIDC1 and VIDC20 docs which you have for this. I've compared my code to RISC OS sources, to double check everything, but we're both working off the same information, I hope...
JonAbbott wrote: Reverse engineering your code, I believe its using the following corrections:
Vxxx = Vxxx + 1
sub = 18 (1/bpp)
sub = 10 (2/bpp)
sub = 6 (3/bpp)
sub = 4 (4/bpp)
HCR = (HCR * 2) + 2
HSWR = (HSWR * 2) + 2
HBSR = (HBSR * 2)
HDSR = (HDSR * 2) + sub
HDER = (HDER * 2) + sub
HBER = (HBER * 2)
Again, I'm not sure where these values are from, in my code I use the following (BASIC code shown, because it's easier to follow, the ARM code is a little optimised, but does the same):
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2960 IF bpp=8 THEN sub=5
2970 IF bpp=4 THEN sub=7
2980 IF bpp=2 THEN sub=11
2990 IF bpp=1 THEN sub=19
Then:
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3010 IF vidc1reg=&80 THEN vidc20reg=&80:vidc20value=((vidc1value*2)+2)-8 :REM HCR
3020 IF vidc1reg=&84 THEN vidc20reg=&81:vidc20value=((vidc1value*2)+2)-8 :REM HSWR
3030 IF vidc1reg=&88 THEN vidc20reg=&82:vidc20value=((vidc1value*2)-1+1)-12 :REM HBSR (hbpch+1 VIDC1 fix)
3040 IF vidc1reg=&8C THEN vidc20reg=&83:vidc20value=((vidc1value*2)-1+sub)-18 :REM HDSR (hbpch+1 VIDC1 fix)
3050 IF vidc1reg=&90 THEN vidc20reg=&84:vidc20value=((vidc1value*2)-1+sub)-18 :REM HDER (hbpch+1 VIDC1 fix)
3060 IF vidc1reg=&94 THEN vidc20reg=&85:vidc20value=((vidc1value*2)-1+1)-12 :REM HBER (hbpch+1 VIDC1 fix)
3070 IF vidc1reg=&9C THEN vidc20reg=&87:vidc20value=(vidc1value*2) :REM HIR
As I said, I'll grab ADFFS216m now, and have a play. I'll also pull up the source code and take a closer look to see where our conversion of VIDC1 differs.